The fabrication of Bipolar Junction Transistors (B.J.T.) by the Diffused Planar Process is the objective of this report. The diffused planar process is self-explanatory in itself by the name.
A. Lee at Bell Labs, uses a vapour of the impurity atoms surrounding the semiconductor material as it is heated, so that impurity atoms can diffuse in to the crystal lattice of the semiconductor. Thus, a region of N or P type semiconductor can be diffused into a block of pure intrinsic semiconductor, or (if the concentration is large enough) can change an existing N-type into P-type (or vice-versa) by providing more sources of holes than electrons.” The use of SiO2 on the silicon substrate ensures isolation of the P and N regions and that the impurities don’t diffuse into the areas and therefore leads to the formation of well-defined P and N regions on the wafer. Given below is the diagram of cross-section of a NPN transistor:
Figure 1: Cross-section of a n-p-n BJT 
The fabrication of BJT comprises of various sub-steps like RCA (Cleaning Process), Thermal Oxidation, Photolithography, Diffusion, Metallization, Alloying Process etc.  The process of fabrication starts by cleaning the substrate of impurities by the RCA procedure followed by developing a layer of SiO2 on the planar surface by the process of oxidation. The wafer is then coated with an appropriate photoresist material and developed by exposure to UV through base mask (mask #1).  After sufficient time of exposure, the SiO2 is removed by etching out from the region of base-diffusion followed by cleaning away the covering of the remaining photoresist coating.  ...