PowerPC is largely based on IBM's earlier POWER architecture, and retains a high level of compatibility with it; the architectures have remained close enough that the same programs and Operating Systems will run on both if some care is taken in preparation; newer chips in the POWER series implement the full PowerPC instruction set.
The original POWER microprocessor, one of the first superscalar RISC implementations, was a high performance, multi-chip design. IBM soon realized that they would need a single-chip microprocessor and to eliminate some POWER processor instructions to scale their RS/6000 line from lower-end to high-end machines, and work on a single-chip POWER microprocessor, called the RSC (stands for RISC Single Chip) began. In early 1991 IBM realized that their design could potentially become a high-volume microprocessor used across the industry.
IBM approached Apple with the goal of collaborating on the development of a family of single-chip microprocessors based on the POWER architecture. Soon after, Apple, as one of Motorola's largest customers of desktop class microprocessors, asked Motorola o join the discussions because of their long relationship, their more extensive experience with manufacturing high-volume microprocessors than IBM and to serve as a second source for the microprocessors. This three way collaboration became known as AIM alliance, for Apple, IBM, Motorola. In 1991, the PowerPC was just one facet of a larger alliance between these three companies. On the other side was the growing dominance of Microsoft and Windows in personal computing and of Intel processors. At the time, most of the Personal Computer industry was shipping systems based on Intel 80386 and 80486 chips, which had CISC architecture and development of the Pentium Processor was well underway. The PowerPC chips was one of several joint ventures involving the three, in their efforts to counter the growing Microsoft-Intel dominance of personal computing.
The PowerPC is designed along RISC principles, and allows for a superscalar implementation. Versions of the design exist in both 32-bit and 64-bit implementations. Starting with the basic POWER specifications, the PowerPC added some features, including:
Support for operation in both big-endian and little-endian modes - the PowerPC can switch from one mode to the other at runtime. This feature is not supported in the PowerPC G5.
Single-precision forms of some floating point instructions, in addition to only double-precision forms.
Additional floating point instructions at the behest of Apple.
A complete 64-bit specification, which is backward compatible with the 32-bit mode.
Removal of some of the more esoteric POWER instructions, some of which could be emulated by the Operating Systems, if necessary.
A paged memory management architecture which is used extensively in server and PC systems.
Addition of a new memory management architecture called Book-E, replacing the conventional paged memory management architecture for embedded applications. Book-E is application software compatible with existing PowerPC implementations, but requires minor changes to the Operating Systems.
Operating Systems that work on the PowerPC architecture are generally divided into those which are oriented towards general-purpose PowerPC systems, and those oriented towards the embedded PowerPC systems.
A 64-bit PowerPC application