The data and observation were recorded whilst simulating the above circuits.
RC circuit contain both resistor connected in series and the capacitor. The system can be used to control timing. When DC voltage source is connected across an uncharged capacitor, the rate at which the capacitor charges up decrease as times passes and the frequency changes
The objectives of the experiment was to investigate how the voltage across varies as it charges and to find its capacitive time constant. The circuit investigated the phase angle between each frequency at different voltage for both the input and output voltage. It aims at verifying the nature of the peak amplitude for every output and input wave front form
The experiment was undertaken in accordance with the underlying laboratory procedure. Computation entail values of V(t).The circuits for charging and corresponding discharging the capacitor were sketched. They were wired in order to fully charged or discharge by switching the circuits. The apparatus was connected as shown in the diagram above and their frequencies were set in the time setting as shown above. Measurement was taken from the different frequency across, voltage noted across frequency, and a table was form to tabulate the phase angle for each frequency. The tabulated measurement was used for calculation and drawing of the graph. The graphs draw was used to tabulate the for the peak amplitude for both input and output.
The circuit A and circuit B had peak amplitude for the output is 10v/Dv and corresponding input peak amplitude of 7.5v/Dv. In circuit C peak amplitude was 10V/Dv whilst the input peak amplitude was 8V/Dv
As the frequency escalates from 100Hz to 10 kHz the corresponding output, voltage reduces from 9.9v to 0.718v. Thus, plotting the underlying output voltage against the input frequency, the output voltage becomes 70.7% of the input voltage gives as
The output signal is attenuated to 70.7% of the underlying input