Design a System of Modest Complexity: A Reverse Polish - Coursework Example

Running head: REVERSE POLISH CALCULATOR Customer Inserts His/Her Name Customer Inserts Grade Course Customer Inserts Tutor’s Name 10TH May 2011 The research paper is designed for the purpose of understanding how to design a modest complexity system mainly a calculator (reverse polish calculator) that uses 4 decimal digits. However, since the project involves majority of milestones which allows the designer to perform a top-down design. The project thus will involve exploring several approaches of the hardware wedge plan for the purpose of understanding the size and speed of the device. The designer while constructing the device there are certain things that requires be accessing and emphasizing for instance, the device has to be in the mode of Register Transfer Level (RTL) that is usually associated with complex digital systems. The calculator thus will require be designed and implemented in an MUO microprocessor means which will guide in interfacing the components (Rode, Whitney and Chung, 1972). These interfaces will be for instance FGA and also a PS/2 keyboard which includes a microcontroller that uses a certain serial communication. However, by introducing a reverse polish notion to the system which comes with aspects of arithmetic mathematics in the scientific calculators, these will guide since the inclusion of some traditional perched decimals flaunts which usually switches automatically into notations that are scientific in nature. Initially since the Hp-35 from the reverse notations which displays 10 digit mantissa plus then it will be easier to try and reduce these digits into a reverse polish calculator modern calculator that has a high speed. It will be thus proper to try and design this calculator is such a way that the reverse polish calculator Led’s will work much better in displaying 4 digits mantissa which will provide a sign and also a decimal point and a sign. Nonetheless, the device will thus be designed such that it will display a single LED digit during multiplexing and at the same time it is illuminating light with the single LED segment. The calculator will also be designed in a bit serial machine just like the HP-35 where it will be processing 56-bit point numbers (floating) which will be representing a reverse polish calculator binary coded decimal numbers. Since RPN (postfix notation) provides a simpler and a more practical way rather than just showing the procedure which works by performing several convectional procedures that includes arithmetic calculations. It will also be better to incorporate the use of parenthesis and also the equal signs (infix notations). The calculator will thus be able to calculate operations for example as the RPN performs the arithmetic’s as 4+5 = 6 being 4 ENTER 5+. The result in the reverse polish calculator then will be the same but at some instances a SHIFT icon will be used to operate the sums. More so, the reverse polish calculator will be designed to have the memory in the reverse manner which will act as storage for variables and the results which at some point when required they will be accessed and retrieved for future use. This memory will thus store data in a certain pipe of registers mainly the LIFO that is a stack (Rode, Whitney and Chung, 1972). RTL tend to use the integer mainly additional and subtraction but what make it different from HP-35 is the those are entered because RP engine level I use PS/2 keyboard and are displayed or presented in a format of seven segment through ATMEGA8 MCU. To fully be able to describe we need to compare HP-35 functionality and reverse polish calculator functionality in a RTL system by use of RP Engine Level I .HP -35 have different button namely CHS button which changes the sign of the current number on the display and CLX clears the display to a 0 while CLR key clears the s6acks while the reverse polish calculator uses keys namely EEX key which convert a number to a scientific notation, PI key which stores the number ,and finally what also differentiate these two calculation is the keyboard designations of the two because HP-35 keys use AT keyboard designations while reverse polish calculator use RP function keyboard designation which instead of using integer as the HP-35 use to store information , while reverse polish calculator use enter key to store information on stack. Furthermore , at this level there is no need of getting into tough arithmetic’s and the only ALU which can be used is just a place holder but this what make this level very important milestone. The essential important of this level is that precision is to be the full 4.0 meaning four decimal digits with no decimal point while the HP stack has four levels which make it tricky because a stack in the project should be at least four levels deep, so that they can handle overflows by displaying a row of 4 minus signs in the seven segment displays (Cochran, 1972). The test bences that will be used while constracting a modern reverse polish calculator will require 64-bit write ad read acess for example SOC, EJTAG debuging interface and also a configuring 16,32 and a 64-bit 4-way associative set of I & D cache. More so it will be important thus to perform arrangement level legalization but RTL verification flow will not be associated with any practical means of taking in the data. RTL simulations then will be run at very fast speed this gives way to the interupt traces and RTL traces. However, test bences will thus be used while veryfying the design is correct for example by taking MUX_2 the module will can be created as a test bench. This can be given as follows:- module MUX2TEST; // No ports! ... initial // Stimulus ... MUX2 M (SEL, A, B, F); initial // Analysis ... endmodule The arithmetic system blocks designed for division and multiplications will be implemented in such a case such that the binary words used will be operated on. This will work as simplicity and at a fixed price which usually for cost effective means. Simulink software’s will thus be used after the arithmetic operations are operated within the outputs and the inputs of the reverse polish calculator. The process of multiplication will involve the multiplication of two binary numbers for example m-bit and an n-bit number which will result in m+ n bits in length for both the unsigned and the signed words. These can be showed in the example as fixed simulink blocks that is where Vc and Vb are as the inputs and the Va as the outputs. However, for division the real values for the equation thus obey the equations. These can be shown as whereby Vc and Vb being the input values and Va acting as the out put values (Cochran, 1972). Verilog RTL coding style that could be employed in the design of the modern calculator will be a non-blocking type where it will work within always block which should be executed sequentialy. Given an example the variable will be used under some conditions exprerssions or over the assignment that need to be assigned values. However, in the module “Z” can be declaired to be a register in the device. This register then will be simulated by the use of VCS and thus the stale values registered as register “Z”. References Cochran, D.S. (1972). Algorithms and accuracy in the hp-35:New York, Cambridge UniversityPress. Rode T.M., Whitney and Chung C. Tung. (1972). the ’powerful pocketful’: an electronic calculator challenges the slide rule: New York, Cambridge UniversityPress. Read More