School of Computing and Information Systems, Faculty of SEC Note: this is an individual assignment. Marks will only be given to answers with explanations. No explanations, no marks. Coursework Assessment Specification Module Number: CO2071B Title: Operating Systems and Networking Lecturer: Dr…
BEFORE submission, each student must complete a faculty coursework cover sheet obtainable from the Student Office. This assignment is being marked by student number, please ensure that you complete the correct cover sheet. Notes: Late penalties You must meet all deadlines set. Failure to do so will result in a penalty. The usual deadline time is 1pm on the stated day – ALL work received after this time will be stamped LATE by Student Office staff. Work submitted late but within a week of the deadline will be capped at 40% and receive a grade of LP (Late Pass) unless it is not of a passing standard in which case it will receive a grade of LF (Late Fail). Work submitted beyond a week of the deadline without approval will get 0% with a grade of F0. If, however, you have a serious problem which prevents you from meeting the deadline you may be able to negotiate an extension in advance. In the first instance you should contact the Student Liaison Officer, Holly Rook in the Student Office for advice. However any extension will need to be obtained from your Module Leader who will sign your mitigating circumstances form and agree a new hand in date. Your work will then be marked without penalty. Use of Unfair Means You are reminded of the University’s plagiarism regulations (http://student.kingston.ac.uk/C6/Plagiarism/) and that the work you submit for assessment should contain no section copied in whole or in part from any other source unless where explicitly acknowledged by means of proper citation. Question I: Instruction Set Architecture (20 marks) 1.1. Define Instruction Set Architecture (ISA). Use examples to assist your answer. (5 marks) I.S.A is an acronym for “instruction set architecture “and it serves as an interface between the software and hardware, and is that section of a processor which is visible to the programmer .Various important terms are interrelated with this concept which includes operand, its size, its location and its type. Various important types of I.S.A: General Purpose Register (G.P.R): Operands in this case are mostly the registers or memory location Stack: The operand is implicitly on top of the stack. Accumulator: one of the operand is the accumulator Each of the above have their own strengths and weaknesses .Recently most processors are General Purpose oriented .Over period of time registers use has made things faster and easy .Examples of G.P.U are Motorola 86xxx,IBM 360 Various extensions: RISC: Reduced Instruction Set Architecture .This form of Architecture introduces pipelining concept and has large number of registers compared to CISC. It lays emphasis on the software; with lower cycles per second .The embedded systems are prime example of this type of architecture processor, especially the gaming consoles CISC: Complex Instruction Set Architecture, example in this case is Intel architecture of 80 x86 and the most ubiquitous Pentium Family processors are all CISC. Processor performs most of the instructions operations. It lays emphasis on the hardware, and has higher cycles per second 1.2. A processor has a 32-bit instruction format with the following fields: opcode: 8 bits ra: 6 bits rb: 6 bits rc: 6 bits rd: 6 bits Where ra, rb and rc specify three input registers and rd specifies one destination register. If there is a single register file to store the identifications of all registers, how many ...
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It provides the means with which the software communicates with the hardware to tell it what to do. Instruction set architecture can best be described using five categories:
1.2. A processor has 32 bit instruction format with
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3 Pages(750 words)Coursework
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